A Spacetime Volume Implementation of a Logical S Gate in the Surface Code
Yuga Hirai, Shota Ikari, Yosuke Ueno, Yasunari Suzuki
Abstract
The logical S gate implemented via twist defect braiding in the surface code is one of the major sources of overhead in fault-tolerant quantum computing, since an S-gate correction is required in every logical T-gate teleportation. Existing logical S-gate implementations require spacetime volumes of or , where is the code distance of the surface code. To the best of our knowledge, their circuit-level implementations have not yet been shown, hindering quantitative comparisons of fault distances and logical error rates. In this work, we provide these missing circuit-level implementations. Additionally, we propose a novel twist defect braiding protocol that reduces the spacetime volume to . First, we construct an implementation of the proposed method using constant-length non-local gates, and then refine it to utilize only nearest-neighbor two-qubit gates on a square grid, without requiring additional two-qubit gate depth beyond that of standard syndrome extraction circuits. Through numerical simulations, we evaluate the fault distances and logical error rates for both existing and proposed methods. Our results show that, although the proposed method reduces the fault distance by one or three, its logical error rates remain comparable to those of existing methods at large code distances () and at physical error rates near . This demonstrates that the proposed method is promising for near-term fault-tolerant quantum computing.
AI Impact Assessments
(3 models)Scientific Impact Assessment
Core Contribution
This paper addresses a specific but important problem in fault-tolerant quantum computing: reducing the spacetime overhead of logical S gates implemented via twist defect braiding in the surface code. The S gate is particularly relevant because an S-gate correction is required in every logical T-gate teleportation, making it a recurring cost in fault-tolerant circuits.
The main contributions are threefold: (1) a novel twist defect braiding protocol achieving spacetime volume 2d × d × d, down from the previous best of 2d × 1.5d × d (Gidney) and 2d × 2d × d (Bombín); (2) two concrete circuit-level implementations—one using constant-length non-local gates (fault distance d−1) and one using only nearest-neighbor gates with CXSWAP (fault distance d−3); and (3) the first publicly available Stim circuit implementations for all methods, including the two existing ones, enabling fair quantitative comparison.
Methodological Rigor
The paper demonstrates solid methodological work. The authors provide detailed defect diagrams (both 2D step-by-step and 3D spacetime), detector diagrams, and syndrome extraction diagrams. The construction proceeds systematically: first establishing the topological correctness via defect diagrams, then building the non-local implementation, and finally refining to a local-gate-only version.
The fault distance analysis uses Stim's built-in search functions (`shortest_graphlike_error` and `search_for_undetectable_logical_errors`), checked up to code distances 23 and 7, respectively. The logical error rates are computed via Monte Carlo sampling with PyMatching as the decoder, using a standard circuit-level depolarizing noise model. The comparison against idling circuits of equivalent spacetime volume is a thoughtful control.
One notable finding from the circuit-level analysis is that Bombín's method, previously thought to maintain fault distance d, actually has fault distance d/2 due to hook errors from rectangular stabilizers—a fact only discoverable through explicit circuit implementation. This validates the authors' point about the importance of circuit-level analysis.
However, some limitations in rigor should be noted. The noise model is uniform depolarizing, which may not capture realistic hardware biases. The decoder (PyMatching with graph-like decomposition of hyperedges) is not optimized for this specific geometry, and a tailored decoder might yield different relative performance. The paper also does not provide a formal proof that d−1 and d−3 are tight lower bounds on fault distance rather than just upper bounds.
Potential Impact
The practical impact is significant for near-term fault-tolerant quantum computing architectures. The 33% reduction in spatial footprint (from 2d × 1.5d × d to 2d × d × d) directly translates to fewer physical qubits needed during S-gate execution. Given that S gates appear in every T-gate teleportation, this overhead reduction compounds across an entire computation.
The work is particularly timely given recent advances in magic-state cultivation that have reduced T-gate costs, potentially making S-gate overhead a more prominent bottleneck. The paper explicitly acknowledges this shift in the cost landscape.
The publicly available Stim circuits are a valuable community resource. Prior to this work, no circuit-level implementations existed for these logical S-gate methods, preventing fair comparison. This contribution enables reproducibility and further optimization by other groups.
The local-gate implementation using CXSWAP gates without additional two-qubit gate depth is practically important for superconducting architectures, while the non-local variant is relevant for neutral-atom platforms. This hardware-awareness broadens the applicability.
Timeliness & Relevance
The paper is highly timely. With Google's recent demonstration of quantum error correction below the surface code threshold and ongoing work on magic-state cultivation, the community is actively working to reduce all sources of overhead in fault-tolerant computation. The observation that Clifford operations (particularly S and H gates) may become relative bottlenecks as T-gate costs decrease gives this work urgency.
The paper also connects to the synchronization problem in fault-tolerant architectures—the proposed method avoids the synchronization issues present in Bombín's method (which requires SWAP gates that add gate depth), making it more compatible with multi-patch surface code computations.
Strengths & Limitations
Strengths:
Limitations:
Overall Assessment
This is a well-executed engineering contribution to fault-tolerant quantum computing that solves a concrete problem with clear practical relevance. The combination of reduced spacetime volume, explicit circuit implementations, and quantitative benchmarking makes it a complete package. While not conceptually groundbreaking—it builds incrementally on the Y-error asymmetry analysis of Gidney—the practical value is substantial. The work fills an important gap in the literature by providing the first circuit-level implementations and fair comparisons of logical S-gate methods.
Generated Apr 16, 2026
Comparison History (38)
Paper 1 presents a novel experimental demonstration of a key multipartite protocol (quantum secret sharing) in superconducting microwave networks, surpassing the no-cloning threshold. Experimental milestones in quantum networking generally have broader immediate impact and lay the groundwork for future hybrid quantum internet architectures. While Paper 2 offers a valuable theoretical optimization for fault-tolerant quantum computing overhead, Paper 1's experimental realization and its connections to multiple quantum information tasks provide a wider breadth of impact and foundational advancement.
Paper 1 addresses a critical bottleneck in scalable fault-tolerant quantum computing by significantly reducing the spacetime volume of logical S gates in the surface code. This fundamental improvement in quantum error correction overhead will broadly impact the timeline and architecture of large-scale quantum computers. Paper 2 presents a solid but niche proof-of-principle application of VQE to nuclear physics, which relies on NISQ methods that generally face deeper scalability challenges.
Paper 2 proposes a paradigm shift in quantum networking by bypassing classical pathfinding using multipartite entanglement complementation. This fundamentally changes how quantum routing is conceptualized, offering broad implications for the architecture and scalability of the future quantum internet. While Paper 1 provides a valuable optimization for fault-tolerant quantum computing, Paper 2's conceptual novelty and potential to redefine quantum network protocols give it a higher transformative scientific impact.
Paper 2 directly addresses one of the most significant bottlenecks in fault-tolerant quantum computing by reducing the spacetime volume overhead for logical S gates. Its practical circuit-level implementations and relevance to scaling near-term quantum computers give it higher potential for immediate real-world technological impact compared to the theoretical framework presented in Paper 1.
Paper 1 addresses a critical and immediate bottleneck in fault-tolerant quantum computing (FTQC) by significantly reducing the spacetime volume of logical S gates in surface codes. By providing concrete circuit-level implementations and numerical simulations, it offers highly practical optimizations that directly reduce the massive overhead required for FTQC. While Paper 2 presents an innovative protocol for quantum networking, Paper 1's concrete improvements to error correction architecture will have a more profound and immediate impact on the timeline for realizing large-scale, fault-tolerant quantum computers.
Paper 2 addresses a critical practical bottleneck in fault-tolerant quantum computing—reducing the overhead of logical S-gate implementation in surface codes. This has immediate, quantifiable impact on near-term quantum computing architectures. The 25-33% reduction in spacetime volume for a frequently-used operation is highly relevant given current efforts toward practical fault-tolerant quantum computers. Paper 1, while analytically rigorous, studies a more specialized topic in many-body quantum dynamics with narrower immediate applicability. Paper 2's timeliness and direct engineering relevance give it broader impact potential.
Paper 2 demonstrates higher potential impact because it directly optimizes a critical bottleneck (the logical S gate) in the surface code, the leading architecture for fault-tolerant quantum computing. By significantly reducing spacetime volume and providing practical, nearest-neighbor circuit-level implementations backed by numerical simulations, it offers immediate resource savings for real-world quantum hardware. Paper 1, while theoretically novel in flag-based fault-tolerance, applies to code families (like iceberg and Steane codes) that currently have less momentum for large-scale scalable physical implementation than surface codes.
Paper 2 likely has higher impact: it provides experimental evidence on how decoherence affects the non-Hermitian skin effect, resolving an open and timely question at the intersection of non-Hermitian physics, quantum walks, and open quantum systems. The results (survival/enhancement under dephasing, order-dependent behavior under amplitude damping) are broadly relevant across photonics, condensed matter, and nonequilibrium transport, with potential applications in robust directional transport and noise-assisted devices. Paper 1 is valuable for fault-tolerant QC overhead reduction, but is more specialized and offers incremental (though important) resource optimization.
Paper 2 addresses the fundamental problem of quantum-to-classical transition for field theories, extending a geometric framework that derives classical dynamics from unitary quantum evolution with random-matrix environmental interactions. This has broad implications across quantum foundations, quantum field theory, and philosophy of physics. It tackles a deep conceptual question—how classical field equations emerge from quantum mechanics—without requiring coherent states or modifications to Schrödinger's equation. Paper 1, while technically solid and useful for fault-tolerant quantum computing optimization, addresses a more incremental engineering improvement (reducing spacetime volume of a specific gate implementation) with narrower impact.
While Paper 1 introduces a highly effective qumode-based algorithm for near-term quantum chemistry, Paper 2 addresses a fundamental bottleneck in fault-tolerant quantum computing (FTQC). By halving the spacetime volume required for a logical S gate in the surface code, Paper 2 directly reduces the massive overhead associated with universal quantum computation. This fundamental optimization will impact hardware scaling requirements and resource estimates across all quantum algorithms, offering broader and more foundational long-term scientific impact compared to the hardware-specific and application-specific focus of Paper 1.
Paper 1 addresses a critical bottleneck in fault-tolerant quantum computing by reducing the spacetime volume overhead for logical S gates. Its concrete circuit-level implementations and numerical simulations offer highly practical, near-term applications for quantum hardware. While Paper 2 provides valuable theoretical advancements in quantum information theory, Paper 1's direct relevance to the realization of functional quantum computers gives it a higher potential for immediate and widespread scientific impact.
Paper 1 addresses a concrete, high-priority problem in fault-tolerant quantum computing—reducing the overhead of logical S gates in surface codes—with both theoretical proposals and numerical validation. Surface code optimization is central to practical quantum computing, giving it broad relevance and near-term applicability. Paper 2 provides interesting theoretical insights on reachability constraints in variational quantum circuits, but its scope is narrower, focusing on a necessary condition for specific circuit families (e.g., matchgate circuits) and classical surrogates for limited problem classes. Paper 1's practical engineering impact on quantum error correction overhead is likely to attract more attention and citations.
Paper 1 introduces foundational metrics (QCM, QCF, QCC) to quantify quantum connectivity, addressing a critical gap where classical topological metrics fail. These metrics have broad applicability for designing, optimizing, and benchmarking future quantum networks, giving it widespread relevance across the rapidly growing field of quantum communication. In contrast, Paper 2 presents a highly valuable but much narrower overhead optimization for logical S-gates in surface codes. Because Paper 1 establishes universal evaluation tools for an entire emerging field, it promises a wider and more enduring scientific impact.
Paper 2 addresses a fundamental bottleneck in scalable fault-tolerant quantum computing by reducing the spacetime overhead of the logical S gate in the surface code. Since the surface code is the leading error-correction architecture across multiple hardware platforms, these improvements have broad, highly significant implications for building large-scale quantum computers. In contrast, Paper 1, while demonstrating impressive fidelity and speed-up, is limited to a specific hardware platform (trapped Rydberg ions), giving it a narrower scope of impact.
Paper 2 likely has higher impact: it advances experimentally accessible stabilization of finite-energy GKP grid states via a simplified two-channel reservoir-engineering Lindbladian, with explicit energy and convergence estimates plus noise simulations. This targets a central bottleneck for bosonic error-correcting codes and has broad relevance across quantum computing (hardware-efficient QEC), control/quantum optics (engineered dissipation), and quantum metrology (steady-state metrological states). Paper 1 is a valuable surface-code optimization with rigorous circuit-level details and simulations, but it is more specialized and incremental in scope despite clear near-term relevance.
Paper 2 likely has higher impact: it addresses a pervasive, practical bottleneck in microwave quantum technologies (robust quantum-limited amplification) with a broadly applicable modeling/design framework that incorporates environmental Fabry–Pérot interference—useful across superconducting qubits, sensing, and measurement chains. It combines theory with device-level performance and offers actionable diagnostics for real lab setups, increasing real-world adoption. Paper 1 is novel and timely for surface-code overhead reduction, but its impact is narrower to a specific logical-gate implementation and the gains (volume reduction with some fault-distance penalty) may be more incremental and architecture-dependent.
Paper 2 establishes a fundamental theoretical connection between quantum resources (entanglement and magic) and the robustness of quantum simulation against Trotter errors. This conceptual breakthrough has broader scientific implications across quantum information theory and algorithm design compared to Paper 1, which offers a highly technical, albeit important, architectural optimization for surface code implementations.
Paper 1 demonstrates a novel experimental technique that achieves a 50x improvement in storage time for telecom-band quantum memories while preserving GHz bandwidth, and introduces temporal mode multiplexing in warm vapor. This addresses a fundamental limitation of a promising quantum memory platform with clear practical implications for quantum networks. The combination of experimental demonstration, significant performance improvement, room-temperature operation, and telecom compatibility gives it broader impact. Paper 2, while technically sound in reducing S-gate overhead in surface codes, offers an incremental improvement with a trade-off in fault distance, limiting its practical significance.
Paper 2 likely has higher impact: it delivers a concrete reduction in surface-code spacetime volume for a ubiquitous logical operation (S gate), includes missing circuit-level implementations enabling fair benchmarking, and backs claims with fault-distance/logical-error simulations under realistic physical error rates. This directly affects resource estimates and architecture decisions across fault-tolerant quantum computing, a broad and timely area. Paper 1 is rigorous and valuable for superconducting-qubit reliability and radiation diagnostics, but its applicability is narrower to a specific hardware platform and mitigation/monitoring niche, with less cross-field reach than a generic surface-code optimization.
Paper 2 likely has higher impact: it addresses a key overhead bottleneck in fault-tolerant quantum computing (logical S gate in surface code), provides missing circuit-level implementations enabling apples-to-apples comparisons, and proposes a protocol cutting spacetime volume to 2d×d×d with nearest-neighbor gates and no added depth beyond standard syndrome extraction. It includes numerical simulations of logical error rates and fault distances, making results actionable for near-term architectures. Paper 1 is valuable for quantum memories/control, but its applicability is narrower and more platform-specific.