Aditya Bhardwaj, Muzhou Ma, Nadine Meister, Robbie King, Dolev Bluvstein, John Preskill, Madelyn Cain, Qian Xu
Comprehensive, rigorous end-to-end fault-tolerant processor design solving a central open problem, with a standout rate/error-rate advantage over surface codes and reusable tools, tempered by unproven large distances and no experiment.
Despite significant progress on quantum low-density parity-check (qLDPC) codes, building qLDPC processors that are high-rate, high-throughput, hardware-friendly, and fast-to-decode remains a challenge. We introduce mitten codes, a family of qLDPC processor codes of encoding rate and check weight , based on non-abelian groups. Their non-abelian structure evades distance bounds constraining abelian counterparts, allowing mitten codes to reach distance and beyond with just a few hundred data qubits. The logical operators of a mitten code are related by the group action, yielding a modular, low-overhead logical toolkit: full Clifford operations follow from bridging two reusable seed surgery gadgets or from a single fixed extractor. Furthermore, qLDPC processors based on mitten codes support high-rate surgery that executes many logical measurements in parallel, and parallel magic-state injection into all logical qubits at once. Under circuit-level noise, with our fast decoder, the mitten code achieves, without extrapolation, a block logical error rate of per round at physical error rate (PER), while the code reaches at PER. Decoding billion surgery experiments on the code at PER, we observe only two logical failures, demonstrating a qLDPC processor capable of running logical operations. Our decoder is compatible with sub-millisecond average latency per logical cycle, sufficient for real-time decoding on neutral atom hardware. Discovered by an end-to-end design pipeline built on sQetch, a distance estimator orders of magnitude faster than existing tools, and mapping efficiently onto near-term neutral atom and superconducting hardware, mitten codes open a practical path toward fault-tolerant quantum computation.
This paper introduces mitten codes, a family of quantum LDPC codes built from lifted products over *non-abelian* group algebras, and — critically — develops the full stack needed to turn them into practical fault-tolerant *processors* rather than mere memories. The central problem addressed is the well-known "four-way tension" in fault-tolerant architecture design: encoding rate, throughput/parallelism, hardware compatibility, and decoding speed/accuracy. The authors argue (convincingly) that most prior qLDPC work optimizes one axis in isolation.
The key technical insight is that using a non-abelian group evades a distance bound (distance ≤ 6) that constrains abelian constructions of the same base-matrix shape, allowing distance ≥ 18 with only a few hundred qubits at 20% rate. Equally important is the exploitation of group symmetry to produce a *canonical logical basis* in which all logical operators lie in a single group orbit. This yields a strikingly economical logical toolkit: full Clifford operations from just five reusable surgery gadgets (from two seeds), plus parallel surgery and parallel magic-state injection. The work is supported by a genuinely new fast distance estimator (sQetch, claimed ~800,000× over QDistRnd), a competitive "telescoping" decoder, and concrete hardware layouts for both neutral-atom and superconducting platforms.
The paper is unusually thorough. It combines: (i) rigorous algebraic proofs (canonical basis via Künneth/spectral-sequence collapse, distance upper bounds with an explicit counterexample showing the full-row-rank hypothesis is necessary, exact thickness-3 theorem); (ii) large-scale circuit-level Monte Carlo (15 billion surgery shots, 100+ billion SE rounds); and (iii) hardware modeling grounded in prior experimental transport data. The decoder is benchmarked head-to-head against Tesseract, Cascade, Relay-BP, and BP+OSD on the standardized gross-code detector-error models, matching or beating state of the art at nearly double the throughput. The real-time (FPGA) latency analysis is explicitly worst-case. Distance claims for larger codes are honestly labeled as estimates (≤ notation), and timelike-error caveats are flagged. This is a well-controlled, self-critical design.
Minor gaps: the largest-code distances are unproven; atom-loss noise (the dominant neutral-atom error source) is explicitly excluded; and some claims (e.g., teraquop extrapolation) are acknowledged as beyond current certification.
If the results hold, this is a meaningful step toward practical fault tolerance. The headline comparison — the ⟦975,195,≤24⟧ mitten code outperforming a surface-code stack of the same k by nearly two orders of magnitude in *both* qubit count and logical error rate — is the kind of result that reshapes architecture roadmaps. The "processor" framing (quops, processing capacity, throughput, cycle time) provides vocabulary and metrics the field currently lacks and may be widely adopted. The sQetch tool and open-sourced pipeline lower a real bottleneck (code search) and could see broad reuse. Direct relevance to neutral-atom hardware (a fast-moving experimental area with the Lukin/Bluvstein lines of work heavily cited) increases near-term translational value.
Extremely timely. qLDPC codes are the hottest topic in QEC post-2024 (bivariate bicycle "gross code," transversal atom-array logic). The bottleneck has explicitly shifted from *memory* demonstrations to *logical operations*, and this paper targets exactly that. Concurrent work (Hong; Zheng et al.) on non-abelian LP codes and canonical bases is cited, indicating a live, competitive research frontier — a strong signal of relevance, though it slightly tempers the novelty claim.
Strengths: end-to-end completeness (codes → gadgets → decoder → hardware → pipeline), rigorous proofs paired with massive simulations, state-of-the-art decoder, a genuinely useful new tool, and clear, honest scoping of claims. The breadth is exceptional for a single paper.
Limitations: the decisive low-error results rest on Monte Carlo with only a handful of observed failures (statistically thin at the tails, though correctly reported with confidence intervals); largest distances are unproven; atom loss is unmodeled; no experimental demonstration; and reproducibility depends on the open-sourced "yarn"/sQetch repos rather than full in-text specification. The overlap with concurrent independent work modestly reduces the originality premium.
The paper is a building-block contribution: the code family, the canonical-basis machinery, the pipeline, and sQetch are all reusable primitives that others will plausibly adopt. Reproducibility is aided by explicit base-matrix tables (Table XIII) and code release, though the decoder tuning is complex. Resource intensity to *extend* the work is moderate-high: GPU decoding infrastructure and large Monte Carlo budgets are needed, but the codes themselves are small and analyzable on modest hardware.
Overall, this is a high-impact, high-effort contribution likely to be cited heavily across the QEC/quantum-architecture community, with real potential to influence hardware co-design.
Generated Aug 3, 2026
Comprehensive, rigorous end-to-end fault-tolerant processor design solving a central open problem, with a standout rate/error-rate advantage over surface codes and reusable tools, tempered by unproven large distances and no experiment.