This assessment is based on version 1 of this paper. Version 2 is now available on arXiv — the authors may have revised their methods, results, or conclusions.
The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes
Paul Webster, Lucas Berent, Omprakash Chandra, Evan T. Hockings, Nouédyn Baspin, Felix Thomsen, Samuel C. Smith, Lawrence Z. Cohen
Abstract
The realisation of utility-scale quantum computing inextricably depends on the design of practical, low-overhead fault-tolerant architectures. We introduce the \textit{Pinnacle Architecture}, which uses quantum low-density parity check (QLDPC) codes to allow for universal, fault-tolerant quantum computation with a spacetime overhead significantly smaller than that of any competing architecture. With this architecture, we show that 2048-bit RSA integers can be factored with less than one hundred thousand physical qubits, given a physical error rate of , code cycle time of \textmu s and a reaction time of \textmu s. We thereby demonstrate the feasibility of utility-scale quantum computing with an order of magnitude fewer physical qubits than has previously been believed necessary.
AI Impact Assessments
(3 models)Scientific Impact Assessment: The Pinnacle Architecture
1. Core Contribution
The paper introduces the Pinnacle Architecture, a fault-tolerant quantum computing architecture based on quantum low-density parity-check (QLDPC) codes that claims to reduce the physical qubit overhead for utility-scale quantum computing by roughly an order of magnitude compared to previous state-of-the-art results. The headline result is that RSA-2048 can be factored with fewer than 100,000 physical qubits at standard noise parameters (p=10⁻³, 1 μs code cycle, 10 μs reaction time), compared to ~1 million in Gidney's recent work and ~20 million in the earlier Gidney-Ekerå result.
The architecture consists of three modular components: (1) processing units built from bridged QLDPC processing blocks with measurement gadgets for generalised lattice surgery, (2) magic engines that exploit the multi-qubit encoding of QLDPC codes to simultaneously distill and inject magic states within a single code block, and (3) optional memory modules for low-overhead quantum storage. A key algorithmic contribution is Clifford frame cleaning, a technique enabling flexible parallelism across processing units despite the challenges Pauli-based computation poses for parallel execution.
2. Methodological Rigor
The paper provides a relatively thorough end-to-end analysis, but several aspects warrant scrutiny:
Strengths in methodology:
Concerns:
3. Potential Impact
If the results hold up under more realistic assumptions, the implications are profound:
4. Timeliness & Relevance
This paper is exceptionally timely. It arrives during a period of intense activity in QLDPC code architectures (IBM's "Tour de Gross" bicycle architecture, the Extractors work by He et al., fast surgery proposals). It directly addresses the most pressing bottleneck in quantum computing: the overhead gap between current hardware scale and utility-scale fault tolerance. The paper also builds on Gidney's very recent (2025) improved RSA factoring algorithm, immediately improving upon it.
5. Strengths & Limitations
Key Strengths:
Notable Limitations:
Overall Assessment
This is a high-impact paper that presents a compelling architectural vision with concrete, detailed resource estimates showing dramatic improvements over prior art. The core ideas (magic engines, Clifford frame cleaning, modular QLDPC processing) are novel and well-motivated. However, the reliance on optimal decoding and extrapolated simulation data for the largest codes means the headline numbers should be treated as aspirational lower bounds rather than engineering targets. The paper nonetheless represents an important conceptual advance that will likely stimulate significant follow-up work in QLDPC architecture design, decoding, and hardware co-design.
Generated May 1, 2026
Comparison History (118)
Paper 2 offers a disruptive advancement by reducing the physical qubit requirement to break RSA-2048 by an order of magnitude. While Paper 1 provides a crucial hardware discovery for superconducting qubits, Paper 2's Pinnacle architecture drastically accelerates the timeline for fault-tolerant quantum computing. This breakthrough has profound, immediate implications not only for quantum error correction but also for global cybersecurity and cryptography, giving it a broader and more disruptive scientific impact.
Paper 1 addresses a landmark, high-stakes problem: dramatically reducing qubit requirements for breaking RSA-2048, with an order-of-magnitude improvement over prior estimates. This has enormous implications for quantum computing feasibility, cryptography, and cybersecurity, drawing broad cross-field attention and immediate policy relevance. Paper 2 is a solid, technically sophisticated contribution to non-Hermitian many-body simulation, but its impact is more specialized within computational physics. Paper 1's timeliness, breadth of impact, and practical significance give it substantially higher potential scientific impact.
Paper 2 addresses the full physical-qubit cost of breaking RSA-2048, a milestone with broad implications for cryptography and quantum hardware roadmaps. Its order-of-magnitude reduction (100,000 physical qubits) via QLDPC codes tackles the true bottleneck—fault-tolerant physical implementation—rather than logical-qubit counts. This has wider cross-field relevance for hardware, error correction, and post-quantum cryptography timelines. Paper 1 offers a solid but incremental logical-qubit optimization for ECDLP, more specialized and marginal in impact by comparison.
The Pinnacle Architecture paper demonstrates a breakthrough in fault-tolerant quantum computing by reducing RSA-2048 factoring requirements to ~100,000 physical qubits—an order of magnitude improvement over prior estimates. This has enormous implications for cryptography, cybersecurity policy, and the timeline for practical quantum computing. It directly impacts the urgency of post-quantum cryptography migration, affecting governments and industries worldwide. While Paper 1 presents a clever hybrid classical-quantum approach for nonlinear dynamics simulation, its practical advantage over classical methods remains limited, especially given the noise constraints acknowledged. Paper 2's architectural innovation has broader, more transformative implications.
Paper 1 demonstrates a groundbreaking reduction in the physical qubits required to break RSA-2048, dropping the estimate to under 100,000. This result has massive, immediate implications for global cybersecurity, cryptography, and the timeline for utility-scale quantum computing. While Paper 2 provides an important fundamental limit in quantum metrology by debunking exponential gain claims, Paper 1's concrete, paradigm-shifting application to a globally recognized benchmark offers vastly broader cross-disciplinary impact, urgency, and real-world relevance.
Paper 1 demonstrates a breakthrough in reducing the physical qubit overhead for breaking RSA-2048 by an order of magnitude (to ~100K qubits) using QLDPC codes, which has profound implications for both quantum computing feasibility timelines and cryptographic security. This result directly impacts policy decisions on post-quantum cryptography migration. Paper 2 presents a valuable but more incremental architectural contribution specific to neutral-atom platforms. Paper 1's broader cross-field impact (cryptography, quantum architecture, national security) and its dramatic reduction in resource estimates give it higher potential scientific impact.
The Pinnacle Architecture paper demonstrates a breakthrough in fault-tolerant quantum computing by reducing the qubit overhead for RSA-2048 factoring by an order of magnitude (to ~100K physical qubits) using QLDPC codes. This has enormous implications for both practical quantum computing timelines and cryptographic security, directly impacting industry, government, and security policy. Paper 2 presents a novel graph-theoretic framework for open quantum dynamics, which is intellectually interesting but more incremental and narrower in scope. The cryptographic and engineering implications of Paper 1 give it substantially broader and more immediate real-world impact.
Paper 2 has higher potential impact because it drastically accelerates the timeline for utility-scale fault-tolerant quantum computing. By reducing the physical qubit requirement to break RSA-2048 from millions to under 100,000 using QLDPC codes, it transforms the global cybersecurity landscape and accelerates the urgency for post-quantum cryptography. While Paper 1 presents a highly innovative tool for quantum biophysics, Paper 2's breakthrough fundamentally alters computational complexity roadmaps, presenting profound, near-term implications for global digital infrastructure, cryptography, and quantum hardware design.
Paper 2 has higher potential impact due to its profound real-world implications for cryptography and cybersecurity. By demonstrating that breaking RSA-2048 requires an order of magnitude fewer physical qubits than previously believed, it drastically accelerates the timeline for utility-scale quantum computing and the urgent transition to post-quantum cryptography. While Paper 1 offers a valuable foundational framework for quantum information theory, Paper 2 addresses a critical, globally anticipated milestone with immediate, cross-disciplinary relevance to national security, computer science, and quantum engineering.
Paper 1 demonstrates a manufacturable, ultralow-loss Si3N4 integrated photonic platform with record on-chip multiphoton performance (high fidelities, indistinguishability, and >100× fourfold rates), directly addressing a key scaling bottleneck (loss) with strong experimental rigor and near-term applicability across quantum communication and computing hardware. Paper 2 is highly novel and timely in fault-tolerant architecture via QLDPC codes with striking resource estimates, but its impact depends on unproven physical assumptions and future implementation maturity. Overall, Paper 1’s validated hardware advance is likelier to yield broader, immediate scientific and technological impact.