Scalable Fluxonium Quantum Processors via Tunable-Coupler Architecture
Ze Zhan, Zishuo Li, Fei Wang, Wangwei Lan, Xianchuang Pan, Liang Xiang, Xu Dou, Ran Gao
Abstract
Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular, although tunable-coupler-mediated interactions have been validated for small fluxonium systems, it remains unclear whether such designs can be scaled to a multi-qubit lattice. Here, we establish a scalable fluxonium processor architecture based on a modular qubit-coupler unit cell engineered to suppress residual interactions and spectator errors in a many-qubit lattice. The system enables parallel single-qubit gate fidelities approaching 99.99% and two-qubit CZ gate fidelities around 99%. With an optimized gate duration of 32 ns, the best CZ gate fidelity reaches 99.9%. We further validate this architecture in a 22-qubit processor based on the same configuration, where parallel operations enable the deterministic generation of Greenberger-Horne-Zeilinger states involving up to 10 qubits. Together, these results demonstrate that the fluxonium-tunable-coupler unit cell composes without emergent interaction pathologies and establish fluxonium as a scalable superconducting qubit platform.
AI Impact Assessments
(3 models)Scientific Impact Assessment: Scalable Fluxonium Quantum Processors via Tunable-Coupler Architecture
1. Core Contribution
This paper addresses a critical gap in superconducting quantum computing: whether fluxonium qubits—which offer intrinsic advantages over transmons (large anharmonicity, noise protection, long coherence)—can be scaled beyond few-qubit demonstrations into a multi-qubit processor without emergent interaction pathologies. The authors propose and validate a modular fluxonium–transmon–fluxonium (FTF) unit cell architecture, demonstrating it in both a 4-qubit test chip and a 22-qubit linear chain processor.
The key innovation is a spectral allocation strategy that exploits fluxonium's rich energy hierarchy: low-frequency computational transitions (100–500 MHz) are naturally decoupled from high-frequency coupler modes, while plasmon transitions (4–5 GHz) enable controlled interactions when the coupler is flux-tuned into resonance. This eliminates the need for fine-tuned destructive interference between direct and indirect coupling pathways—a technique that transmon architectures rely on but that becomes increasingly fragile at scale. The ~700 μm qubit-qubit separation, enabled by fluxonium's small charge dipole, further suppresses direct capacitive coupling.
2. Methodological Rigor
The experimental characterization is systematic and multi-layered:
The numerical simulations in the appendices provide supporting theoretical analysis of spectral selectivity and spectator suppression. The calibration protocols are described in detail, enhancing reproducibility. One methodological concern is that the best CZ fidelity of 99.9% was achieved under optimized conditions (fixed coupler bias, 32 ns duration), while the operational CZ gates in the 22-qubit system average only 95.65%—a significant gap attributed to coherence non-uniformity rather than architectural limitations, but this distinction requires further validation.
3. Potential Impact
This work has potentially high impact for several reasons:
Platform diversification: The superconducting quantum computing field has been overwhelmingly transmon-centric. Demonstrating that fluxonium can scale to 22+ qubits with competitive performance opens a genuine alternative architecture, which is important for the field's long-term health and robustness.
Simplified scaling: The intrinsic suppression of residual ZZ coupling (without fine-tuned cancellation) addresses one of the most persistent challenges in transmon scaling. If this advantage holds at larger scales, it could significantly reduce calibration overhead—a major practical bottleneck.
Error correction implications: Fluxonium's large anharmonicity and low residual couplings could prove advantageous for error-correcting codes that require parallel operations with minimal crosstalk.
Limitations on immediate impact: The 1D chain topology is a significant constraint—real quantum processors require 2D connectivity. The authors acknowledge this and reference an upcoming double-transmon coupler design, but the 2D extension remains undemonstrated. The average two-qubit gate fidelity of 95.65% on the 22-qubit chip is well below the state-of-the-art for transmon processors, limiting near-term competitiveness.
4. Timeliness & Relevance
This paper is highly timely. As transmon-based processors encounter scaling challenges from spectral crowding and parasitic interactions (explicitly referenced in recent Google and other works), the community needs viable alternatives. Fluxonium has been a "promising but unscalable" qubit for years—this paper directly addresses that criticism with experimental evidence. The timing coincides with increasing attention to error correction thresholds, where the intrinsic properties of fluxonium could provide architectural advantages.
5. Strengths & Limitations
Key Strengths:
Notable Limitations:
Summary
This paper makes a convincing case that fluxonium can scale beyond few-qubit demonstrations, with the FTF unit cell showing no emergent interaction pathologies. The residual coupling suppression results are impressive and represent a genuine architectural advantage. However, the gap between best-case and average performance, the 1D-only topology, and the moderate average gate fidelities temper the near-term significance. This is an important milestone paper that opens a credible scaling pathway for fluxonium, though considerable engineering work remains to make it competitive with leading transmon processors.
Generated Apr 16, 2026
Comparison History (55)
Paper 1 presents a breakthrough fault-tolerant architecture reducing RSA-2048 factoring requirements to ~100,000 physical qubits—an order of magnitude improvement over prior estimates. This has enormous implications for cryptography, national security, and the practical timeline of useful quantum computing. While Paper 2 makes important experimental progress in establishing fluxonium as a scalable platform with strong gate fidelities, it represents incremental hardware advances. Paper 1's theoretical architecture result fundamentally shifts understanding of quantum computing resource requirements and has broader cross-disciplinary impact.
Paper 2 addresses a critical bottleneck in quantum error correction—fast, accurate decoding for quantum LDPC codes—achieving 17x improvement in logical error rates and 3-5 orders of magnitude higher throughput. This has transformative implications for the entire field of fault-tolerant quantum computing, suggesting dramatically lower overhead costs. While Paper 1 is an important hardware demonstration scaling fluxonium processors to 22 qubits, Paper 2's impact is broader, affecting all hardware platforms and fundamentally changing resource estimates for practical quantum computation. The discovery of the 'waterfall' regime and real-time compatible latencies make this particularly impactful.
Paper 2 is more conceptually novel and broad: it introduces a fault-tolerant, single-shot protocol achieving constant-fidelity long-distance entanglement with constant-sized planar devices, plus new connections to many-body physics (robust localizable entanglement, finite-temperature stabilizer Hamiltonian). This has wide implications for quantum networks/repeaters, distributed QC, and condensed-matter theory. Paper 1 is a strong experimental advance toward scalable fluxonium processors with high fidelities, but its impact is more platform-specific and incremental within superconducting hardware compared to Paper 2’s cross-field theoretical leap.
Paper 1 likely has higher impact: it demonstrates a scalable hardware architecture for fluxonium processors with state-of-the-art gate fidelities, fast CZ gates, and validation on a 22-qubit device with multipartite entanglement generation—clear, timely progress toward fault-tolerant superconducting quantum computing with immediate experimental and industrial relevance. Paper 2 offers novel theoretical security/robustness insights for distributed VQAs, but is primarily simulation/theory and its practical impact depends on future distributed quantum deployments and threat models, making near-term cross-field uptake less certain.
Paper 1 likely has higher impact: it demonstrates a scalable hardware architecture for fluxonium with high-fidelity parallel 1Q/2Q gates, a fast 32 ns CZ, and validation on a 22-qubit processor including multi-qubit GHZ generation—directly advancing fault-tolerant–relevant superconducting platforms and broadly influencing quantum computing engineering. Paper 2 is novel and timely for distributed VQAs/security, but is primarily theoretical/simulation-based and targets a narrower, less mature deployment setting, likely limiting near-term cross-field and real-world uptake compared to a major hardware scalability milestone.
Paper 1 addresses a critical bottleneck in quantum computing scalability—control and wiring—by demonstrating a fully integrated system with cryo-CMOS control and silicon exchange-only qubits. Leveraging advanced semiconductor manufacturing for both qubits and control electronics presents a more viable long-term path to utility-scale, millions-of-qubits systems compared to superconducting architectures. Paper 2 is an excellent advance for fluxonium qubits, but Paper 1's holistic system-level integration of the control stack offers broader transformative potential for the field.
Paper 1 demonstrates a crucial experimental breakthrough by successfully scaling fluxonium qubits to a 22-qubit processor with extremely high fidelities. While Paper 2 offers significant theoretical advancements in fault-tolerant quantum learning, Paper 1 provides immediate, tangible progress toward scalable quantum computers, addressing one of the most critical physical bottlenecks in the field today.
Paper 1 offers a broadly applicable conceptual advance: a fault-tolerant “quantum uploading” framework that restores exponential learning speedups despite noisy experimental interfaces, plus a new lower-bound technique (Heisenberg learning tree). If correct, it impacts quantum algorithms, metrology/imaging, and experimental design across platforms, with strong timeliness as fault-tolerant era approaches. Paper 2 is an important engineering step toward scalable fluxonium with impressive fidelities and a 22-qubit demo, but its impact is more platform-specific and incremental relative to the wider field convergence on scalable superconducting architectures.
Paper 1 demonstrates a more comprehensive and novel system-level integration: a digitally controlled silicon quantum processor with cryogenic CMOS control, superconducting interconnects, and exchange-only qubits in a 54-dot array. It advances EO qubit fidelities by an order of magnitude and demonstrates error correction codes, addressing the full stack from manufacturing to error correction. This silicon-based approach has broader industrial implications due to CMOS compatibility. Paper 2 makes important contributions establishing fluxonium scalability, but operates within the more mature superconducting qubit ecosystem with more incremental architectural advances.
Paper 2 presents a major experimental breakthrough by demonstrating a scalable hardware architecture for fluxonium qubits, a promising alternative to transmons. Validating high-fidelity gates on a 22-qubit processor provides a foundational advancement for building practical quantum computers. While Paper 1 offers valuable algorithmic optimizations for quantum chemistry simulations, Paper 2's hardware realization has a broader and more immediate impact on the entire field of quantum computing.
Paper 2 demonstrates a scalable fluxonium quantum processor architecture addressing a critical open problem in quantum computing—showing that an alternative to transmon qubits can scale to multi-qubit systems with high-fidelity operations. This has enormous practical implications for the future of quantum computing hardware, potentially shifting the field's dominant paradigm. Paper 1 establishes valuable theoretical equivalences between tensor networks and tractable circuits, enabling cross-community knowledge transfer, but its impact is more incremental and confined to theoretical computer science and related areas. Paper 2's experimental breakthrough has broader and more transformative potential.
Paper 1 demonstrates a major hardware breakthrough by successfully scaling fluxonium qubits to a 22-qubit processor with high gate fidelities. Proving the scalability of a promising alternative to transmons provides a tangible, foundational advancement for quantum hardware. While Paper 2 offers valuable algorithmic resource reductions, the physical realization of a novel, robust quantum architecture in Paper 1 represents a broader, more immediate paradigm shift for the entire field.
Paper 1 demonstrates a major experimental advance in quantum computing by establishing fluxonium as a scalable superconducting qubit platform with high-fidelity gates, validated up to 22 qubits. This addresses a critical bottleneck in quantum hardware—moving beyond transmons—with immediate practical implications for building better quantum processors. Paper 2 provides valuable theoretical connections between tensor networks and tractable circuits, but its impact is more incremental, bridging existing formalisms rather than enabling fundamentally new capabilities. The hardware demonstration in Paper 1 has broader and more transformative potential for the field.
Paper 1 presents a major experimental breakthrough by demonstrating a scalable, 22-qubit fluxonium processor with exceptionally high gate fidelities, offering a viable alternative to transmon architectures. This directly impacts the near-term development of practical superconducting quantum computers. In contrast, Paper 2 provides a valuable but primarily theoretical advancement in qudit entanglement generation. The experimental validation and immediate applicability to scaling quantum hardware give Paper 1 a significantly higher potential for broad real-world and scientific impact.
Paper 2 likely has higher scientific impact because it demonstrates a scalable hardware architecture (22-qubit fluxonium with tunable couplers) plus state-of-the-art gate fidelities and fast CZ gates, directly advancing a practical route beyond transmons—highly timely and broadly relevant to quantum computing. Its real-world applicability is immediate for building larger fault-tolerant systems. Paper 1 is methodologically rigorous and novel in model-selection for Lindblad dynamics, but is more of an enabling characterization framework with narrower direct impact than a scalable high-fidelity processor platform.
Paper 2 demonstrates a major experimental breakthrough by scaling fluxonium qubits to a 22-qubit processor with high gate fidelities. While Paper 1 provides a valuable theoretical framework for Rydberg atom metrology, Paper 2's tangible realization of a scalable alternative to transmon qubits addresses a critical bottleneck in quantum computing, offering broader and more immediate technological applications across quantum information science.
Paper 1 likely has higher impact because it demonstrates a scalable hardware architecture for fluxonium qubits with strong gate fidelities, fast CZ (32 ns) reaching 99.9%, and validation on a 22-qubit processor with multi-qubit GHZ generation—directly advancing scalable quantum computing. Its real-world applicability to fault-tolerant roadmaps and hardware platform diversification is immediate and broad. Paper 2 is methodologically innovative and broadly useful for characterization/model selection, but is applied to a 5-qubit system and is more incremental relative to established quantum system identification efforts.
Paper 1 demonstrates a scalable fluxonium processor architecture with a 22-qubit device achieving near-state-of-the-art gate fidelities, addressing a fundamental challenge in quantum computing hardware. It opens a new platform path beyond transmons with demonstrated scalability, which could reshape superconducting quantum computing. Paper 2 presents a useful algorithmic improvement (SQD-AA) for early fault-tolerant quantum chemistry, but it is more incremental—combining two known techniques. The hardware breakthrough in Paper 1 has broader impact across the entire quantum computing ecosystem and establishes a new competitive qubit modality at scale.
Paper 1 presents a critical hardware breakthrough by demonstrating the scalability of fluxonium qubits in a 22-qubit processor with high gate fidelities. This directly addresses the pressing need for scalable, error-protected qubit modalities beyond traditional transmons, offering foundational impact for superconducting quantum computing. While Paper 2 offers a valuable algorithmic optimization for early fault-tolerant applications, Paper 1's physical realization of a scalable, novel architecture is likely to have a more immediate and transformative impact on the trajectory of quantum hardware development.
Paper 2 demonstrates a scalable architecture for fluxonium qubits, achieving high gate fidelities on a 22-qubit processor. This directly addresses a critical bottleneck in quantum computing, offering a viable, error-protected alternative to transmon qubits. Its potential for broad, real-world impact in developing fault-tolerant quantum computers gives it a higher scientific impact than Paper 1, which, while providing highly precise fundamental physics measurements, has a narrower scope of immediate application.