Vine Codes: Low-Overhead Quantum LDPC Codes on a Planar Square Grid
Georgia M. Nixon, Campbell K. McLauchlan, Charles C. L. van Rest
Abstract
The surface code is a promising route towards large-scale quantum computing, requiring only nearest-neighbour gates amenable to superconducting hardware. However, surface codes incur large qubit overheads. Novel quantum low-density parity check (qLDPC) codes promise to reduce overheads but require long-range connections that are difficult to achieve on superconducting platforms. Here, we introduce "Vine Codes" - qLDPC codes that are implementable on a planar square grid through nearest-neighbour, two-qubit gates native to superconducting platforms (iSWAP and CZ). Our approach generalises "Directional Codes" recently introduced by Gehér et. al. (2025) which are constrained to a torus. In contrast, vine codes have open boundary conditions constructed with the aid of routing qubits. We perform extensive numeric searches and find promising candidate vine codes, e.g. [[121,4,6]], [[221,6,7]], and [[234,9,6]] codes. We verify the circuit distances and show that data and measure qubits required can be reduced by up to ~28% relative to the surface code at a circuit distance of 7. Even including routing qubits, vine codes require fewer total qubits than the surface code (e.g. ~18% reduction at circuit distance 10) and benefits are expected to increase at higher distances. We perform circuit-level noise simulations to demonstrate that under a realistic noise model and at a near-term noise rate of , vine codes can perform better than the surface code while using fewer qubits. We give an exhaustive list of all unique vine codes up to stabiliser-weight 9. We additionally introduce "Flip-Vine Codes" which possess single-qubit transversal Clifford gates useful for fault-tolerant logic and magic state cultivation. We furthermore construct examples of generalised open boundaries for vine codes that go beyond the familiar X/Z boundaries of the surface and tile codes.
AI Impact Assessments
(1 models)Scientific Impact Assessment: Vine Codes
1. Core Contribution
This paper introduces "Vine Codes," a family of quantum LDPC codes that achieve higher encoding rates than the surface code while maintaining strict 2D planar, nearest-neighbor connectivity on a square grid. The key innovation is generalizing the recently proposed "Directional Codes" (Gehér et al., 2025) — which require toroidal (periodic) boundary conditions — to open boundary conditions through the introduction of "routing qubits." This is a critical practical step, since toroidal connectivity is unphysical for planar superconducting chips.
The core mechanism exploits the SWAP component of the iSWAP gate (native to superconducting hardware) to dynamically move measure qubits during syndrome extraction, enabling stabilizers with support spanning beyond nearest neighbors. The paper extends this by also incorporating CZ-based (non-swapping) entangling steps, enlarging the code family. The "vine" name derives from the characteristic shape of stabilizer supports.
Additionally, the paper introduces "Flip-Vine Codes" — variants where measure qubits alternate between measuring X and Z stabilizers each round, yielding weakly self-dual codes with transversal single-qubit Clifford gates, useful for magic state cultivation.
2. Methodological Rigor
The paper demonstrates strong methodological rigor across several dimensions:
Exhaustive code search: All valid vine codes up to stabilizer weight 9 are enumerated (147 unique codes after symmetry reduction from 906), with clear validity conditions (commutativity, independent measurement, topological order, patch connectivity) and systematic reduction via D₄ symmetries.
Exact distance verification: Circuit distances for small instances are verified using an exact distance-finding algorithm (dist-m4ri), rather than relying on heuristic estimates. This is important because circuit distances can differ from code distances due to hook errors.
Circuit-level noise simulations: The SI1000 noise model — a well-established superconducting-inspired noise model — is used with appropriate decoders (BPOSD for vine codes, PyMatching for surface codes). The comparison methodology is reasonable: comparing k logical qubits in a single vine code patch against k independent surface code patches.
Boundary construction: The paper provides a complete, explicit procedure for constructing Pauli boundaries and generalised (coloured) boundaries, including corner treatment and routing qubit minimization algorithms. The routing qubit reduction techniques (achieving up to ~66% reduction) are detailed in the appendix.
Limitations in rigor: The d=10 circuit distances are conjectured rather than verified (extrapolated from hook-error-free smaller instances). The decoder used (BPOSD) is not optimal and may disadvantage vine codes relative to surface codes decoded with near-optimal PyMatching. The scaling fits use only a few data points.
3. Potential Impact
Near-term superconducting quantum computing: This work directly addresses the most pressing practical constraint of superconducting quantum processors — the requirement for planar, nearest-neighbor connectivity. By demonstrating ~18% total qubit reduction at distance 10 (and ~28% in data+measure qubits at distance 7) relative to the surface code, with improvements expected at higher distances, vine codes offer a concrete path to reduced resource requirements without hardware modifications.
Bridging the LDPC-hardware gap: The broader significance lies in partially resolving the tension between high-performance qLDPC codes (which typically require non-local connectivity) and hardware constraints. While vine codes cannot achieve the asymptotic advantages of non-local qLDPC codes (being 2D translationally invariant, they are bounded by k=Θ(1), d=Θ(√n)), they offer meaningful constant-factor improvements at practical scales.
Fault-tolerant logic: Flip-vine codes with transversal Clifford gates could integrate into magic state cultivation protocols, reducing data qubits by up to ~83.3% relative to the surface code in periodic boundary examples.
Generalised boundaries: The framework for constructing coloured boundaries for vine codes opens possibilities for more flexible patch geometries and lattice surgery operations.
4. Timeliness & Relevance
This work is exceptionally timely. The quantum error correction community is actively seeking codes that improve upon the surface code at practical scales, as demonstrated by the flurry of related work (tile codes, bivariate bicycle codes, directional codes — several from 2025-2026). The paper explicitly addresses the gap between theoretical qLDPC advances and superconducting hardware capabilities, which is currently a major bottleneck.
The concurrent release with Gu et al. (Ref. 100) working on similar problems underscores the timeliness. The noise rates considered (p=10⁻³) are accessible to current devices, making the results immediately relevant.
5. Strengths & Limitations
Key Strengths:
Notable Limitations:
Overall Assessment
This is a well-executed, practically motivated paper that makes a meaningful contribution to the quantum error correction landscape. It provides a concrete, hardware-compatible improvement over the surface code with rigorous verification, though the improvements are incremental rather than transformative. The open questions around fault-tolerant logic integration will determine the ultimate practical impact.
Generated Jun 19, 2026
Comparison History (24)
Paper 2 demonstrates a more complete and impactful contribution: it achieves up to 4.5× encoding rate improvement over surface codes on a practical 2D hex grid, provides a full computing architecture including lattice surgery protocols, and demonstrates concrete utility-scale application (FeMoco simulation in under a month with 89k qubits) with dramatic 36× space and 6.6× spacetime improvements over prior state-of-the-art. While Paper 1's vine codes are innovative with ~18-28% qubit reductions, Paper 2's improvements are substantially larger in magnitude and more thoroughly connected to real-world quantum computing applications, suggesting broader and more immediate scientific impact.
Paper 1 addresses a critical bottleneck in quantum computing—reducing qubit overhead while maintaining planar hardware compatibility. Vine Codes offer a practical path to lower-overhead fault-tolerant quantum computing on superconducting platforms, which is the leading hardware paradigm. The ~18-28% qubit reduction over surface codes with nearest-neighbor connectivity is immediately applicable to near-term hardware. Paper 2 presents an interesting nuclear spin control mechanism but addresses a narrower problem with less immediate broad impact on the quantum computing field. Paper 1's combination of practical hardware constraints, rigorous numerics, and demonstrated performance advantages gives it higher impact potential.
Paper 1 addresses a critical bottleneck in practical quantum computing: reducing qubit overhead while maintaining hardware compatibility with planar superconducting architectures. Vine Codes bridge the gap between theoretically superior qLDPC codes and practical implementation constraints, offering concrete qubit reductions (~18-28%) over surface codes with circuit-level noise simulations. This has immediate engineering relevance for the leading quantum computing platform. Paper 2 provides elegant theoretical results on shadow estimation complexity, but its impact is more incremental within an established framework. Paper 1's combination of theoretical innovation, practical hardware constraints, and near-term applicability gives it broader and more transformative potential impact.
Paper 2 likely has higher impact: it proposes a new family of planar, nearest-neighbour qLDPC codes directly targeting a key bottleneck in superconducting fault tolerance (connectivity vs overhead), with concrete code instances, boundary constructions, transversal-gate variants, and circuit-level noise simulations showing qubit reductions and performance gains over surface codes. This is timely and broadly relevant to quantum computing architectures and error correction. Paper 1 is novel and useful for NISQ-era multi-copy measurements, but its impact is narrower and the exponential copy overhead tradeoff may limit practical adoption at scale.
Paper 2 has higher impact potential: it targets a major practical bottleneck in fault-tolerant quantum computing (qubit/connectivity overhead) with a concrete, hardware-compatible code family for planar nearest-neighbour superconducting architectures. It provides methodological rigor via numerical searches, circuit-distance verification, exhaustive catalogs up to given weights, and circuit-level noise simulations with realistic noise rates, plus additional value (open boundaries, transversal Clifford variants). The results are timely and broadly relevant to quantum hardware, error correction, and architecture. Paper 1 is conceptually interesting but likely less actionable and may overlap with known isospectral/Lax derivations.
Paper 2 has higher likely impact: it tackles a central bottleneck for scalable fault-tolerant quantum computing—reducing surface-code overhead while preserving strict 2D nearest-neighbour constraints compatible with superconducting hardware. It offers concrete code constructions, exhaustive searches, circuit-distance verification, and circuit-level noise simulations showing qubit-count and performance gains, making it timely and directly actionable for near-term architectures. Paper 1 is innovative in combining quantum communication with distributed learning and adds strong privacy/communication-complexity results, but depends on high-quality entanglement distribution and is less immediately deployable at scale today.
Paper 1 introduces a novel class of quantum error-correcting codes (Vine Codes) that directly addresses a critical bottleneck in scalable quantum computing: reducing qubit overhead while maintaining hardware compatibility with planar superconducting architectures. It demonstrates concrete improvements over the dominant surface code paradigm with extensive numerical evidence and circuit-level simulations. The breadth of impact is larger—affecting quantum hardware design, fault-tolerant computing, and code theory. Paper 2 presents a useful but more incremental error mitigation technique for Trotter-based quantum simulation, addressing a narrower problem with post-processing methods that complement existing approaches.
Paper 1 introduces a novel class of quantum error-correcting codes (Vine Codes) that directly addresses one of the most critical bottlenecks in scalable quantum computing: reducing qubit overhead while maintaining hardware compatibility with planar superconducting architectures. The ~18-28% qubit reduction over surface codes with nearest-neighbor connectivity is a significant practical advance with broad implications for the entire quantum computing field. Paper 2 demonstrates an important experimental milestone (tripartite GHZ states across atomic nodes), but it represents an incremental extension of existing entanglement distribution techniques to three nodes rather than a fundamentally new paradigm. Paper 1's methodological contributions and practical impact on quantum error correction architecture give it higher potential impact.
Paper 1 likely has higher scientific impact: it proposes a novel, hardware-aligned qLDPC construction (planar, nearest-neighbor gates with open boundaries) addressing a central bottleneck in fault-tolerant quantum computing—qubit overhead—while providing concrete code instances, distance verification, exhaustive searches, and circuit-level noise simulations showing performance/overhead gains vs the surface code. The potential applications (scalable superconducting QC, transversal Clifford options, boundary generalizations) are broad and timely. Paper 2 offers a valuable conceptual clarification for quantum batteries in parametric amplification, but its impact is narrower and more device-specific.
Paper 1 likely has higher impact: it proposes a novel qLDPC-family (“vine codes”) explicitly compatible with planar nearest-neighbor superconducting architectures, addressing a central bottleneck (connectivity vs. overhead) in fault-tolerant QC. It provides concrete code instances, exhaustive searches, circuit-distance verification, and circuit-level noise simulations showing qubit savings and performance gains, plus adds transversal Clifford variants and new boundary constructions—broadly relevant to coding theory, architectures, and fault-tolerant logic. Paper 2 is solid and rigorous but is more incremental benchmarking on a specific solvable model, with narrower cross-field impact.